## SHR : logic SHift Right (divide unsigned by a power of two)

The register is shifted towards the LSB, by a number of bits indicated
either by a source register or the optional 16 immediate field (only the
5 LSB are taken into account in both cases).
The MSB of the result are filled with 0s for this logic shift,
while the arithmetic shift (SAR) fills
the MSB with the value of the original MSB.