This instruction inserts one half-word (16 bits) in the top half (MSB) of a given register, allowing the construction of 32-bit constants with only two instructions.
SH 5678h R1; => R1=0x00005678 SHH 1234h R1; => R1=0x12345678
It reuses the IE's units but the offset is set to 2, without considering the implicit offset if the destination register is the Data register of a PFQ.