This instruction inserts one byte (8 bits) in a given register, emulating the "Store Byte" instruction of Load-Store architectures. The source data is shifted left, according to an offset, and inserted in the byte pointed to by the offset in the destination register.
If the target register is a static register, then the offset is zero. If this is the Data register of a PFQ, the 2 LSBs of the associated pointer are used as offset, and the pointer is updated.