This instruction extracts one byte (8 bits) from a given register, emulating the "Load Byte" instruction of Load-Store architectures. The data is shifted right, according to an offset, and the MSB are filled with 0s.
If the target register is a static register, then the offset is zero. If this is the Data register of a PFQ, the 2 LSBs of the associated pointer are used as offset, and the pointer is updated.