This is an alias of the SUB instruction (-A = 0-A). A "short" form alias is available when the source and the destination are the same register.
Combined with a condition on the Most Significant Bit of the operand (the sign bit), this instruction can emulate the "ABS" (ABSolute) opcode:
NEG R1 MSB1 R1 ; equivalent of ABS R1 R1
So far, this instruction has no way to handle properly the negation of 8000h (YASEP16) or 80000000h (YASEP32)