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version 2013-07-28

MUL16L : MULtiply 16 Lower bits

This instruction computes a 16×16-bit multiply with the lower halfword of the first operand (Imm16 or si4, which can be a register or an immediate value), and the lower halfword of the second operand (snd), giving a 32-bit result (the largest possible size for YASEP32).

See also MUL8H for the 8×8 bits version and MUL16H for the higher halfword.