The YASEP's pipeline is designed for the efficient processing of some operations (addition, substraction, rotation...) which set the default behaviour of the instructions : where and how the operands are obtained, what register will receive the result... However, even for these typical operations, one default behaviour is not satisfying for each single instruction, so all the divergences from the default are defined as "flags".
These flags are only visible at the JavaScript level and they are defined in core-js/yasep_flags.js. They are used by all kinds of software, like the assembler, the disassembler and the simulator. These properties are critical for the correct operation of the whole YASEP design software so they should not be modified by the user. However their understanding can be useful and a good programmer benefits from knowing them so here are some explanations.
There are two kinds of FORM_IR instructions : those where the register is a source operand, and those where the register indicates a destination.
Note : This flag is necessary to use the flag IMM20.
These flags are used when a register operand can be omitted in the source code, if the source register is the same as the destination register. They turn FORM_RR into FORM_R, or FORM_IRR into FORM_IR. The si4 and snd fields are set to the same value, but only one value is mentioned in the source code.
These flags indicate that the instruction is valid only for a particular datapath width. When none is set, the instruction is generic (valid for 16-bit and 32-bit implementations).
If an instruction flagged as YASEP32_ONLY is decoded by a 16-bit YASEP (for example), this is an invalid instruction. The CPU could ignore them, hang or trap : it is undefined because the trapping mechanism is not yet designed. Some constant flags in the Special Register space will allow user code to determine the datapath width.
See also YASEP16/YASEP32/YASEP
Note : currently (2011-09), the YASEP16_ONLY flag is not used, but it could be used in the future.
Some instructions are optional and can be left out of the core's implementation when not needed or when space is too tight.
As with ALIAS_RR, a CPU that does not implement these instruction could ignore them, hang or trap. Some constant flags in the Special Register space will allow user code to determine whether these instructions are implemented.
This instruction does not write anything to the register set. The suitable destination register field will be ignored by the instruction decoder, and no destination field can be specified at the assembly language level.
The "comparison" instructions can disable, or abort, the writeback of a value to the register set. The destination may remain unchanged or untouched after the instruction is executed. The mechanism for the abortion of the writeback (and all its side-effects) is also used by all the conditional instructions (with the extended form).
The usual computation instructions can be "aborted" because the result's writeback can be inhibited at the last cycle of the pipeline. The operation is still speculatively performed by the execution units, however.
Some instructions don't write a result, or they perform operations that can't be aborted by inhibiting the writeback. The NO_CONDITION flag specifies that this instruction does not accept extended conditions when encoding, and will ignore them when decoding. The operation will always be performed.
Usually, the constant fields (Imm4 and Imm16) are sign-extended during decoding so the assembly language supports -8 to 7 or -32768 to 32767 ranges.
However, some instructions (like the SHL group and GET/PUT) must also support positive ranges. MUL8L and MUL8H are unsigned multiply instructions. The flag IgnoreImmSign tells the assembler that 0 to 15 or 0 to 65535 are valid ranges.
This flag indicates that the instruction will not take into account more than 5 or 8 significant digits in the long immediate form, or more than 1 or 2 least significant digits of the Imm4 field.
This flag indicates that the instruction affects the carry flag (the LSB of PC).
This flag indicates that the instruction affects the zero flag, it's useful after CMPU/CMPS so far.
During the read stage, the instruction does not use the value provided by the snd or si4 field. No side-effect (related to the read operation) will happen, whatever the value in the field (it is usually cleared). However the snd or si4 fields could still be used as a destination address during the write cycle.
This flag indicates that the IMM16 field (for the long immediate instructions) is never used. It is often linked to IGNORE_SI4 but can also indicate that a long form is not accepted.
This flag is specific to the instructions that ignore the snd field, such as MOV instruction. In the case of YASEP32, these 4 bits are used as the sign-extended MSB of the immediate constant, providing a signed 20 bits number range (instead of 16 in YASEP16).
Note : This flag requires the flag SWAP_IR.
Instructions marked with this flag are being designed. The opcodes are reserved for a specific use. The name or use could change or disappear at any time. Do not rely on them yet.
This flag is used by some instructions that require 3 operands: in this case the DST3 field serves as both source and destination in the extended form.
This flag implies that the only possible forms are RRR or iRR (extended forms)