Preliminary map for the Special Registers dedicated
to the alphanumeric LCD port (HD44780-compatible interface
with nibble & write only mode)


address 0 : Control (R/W)
    output = disabled on reset (readback possible on the data bus)
    PWM out, FSM run  = 0 (disable)
    clk enable = 0 (disabled)
    clk select = 0 (slowest)
    peripheral=ready (RO)
    nibble/byte=0 (nibble)
    IRQ en = 0   (disabled)
    8/16 bits = 0 (8 bits)
    Pwm Pull/PushPull = 0 (pull)
       RC: 1K + 100nF avec sortie PD à env. 500KHz

address 1 : PWM/PD contrast register (RW, reset=0)
   8-bit register with a counter's update value
  so the output pin is filtered by a R/C (1K/100nF)
  circuit to feed the LCD's contrast pin.
  The output is either push/pull or pull to reduce
  the power consumption.

address 2 : data write register (W/R, reset=?)
  - when reading, we get only the bits 4 to 7 of the LCD's data bus
  - when writing, the FSM starts, selects the data register,
      and shifts the nibbles while strobing the EN pin.

address 3 : instruction write register (W/R, reset=?)
  - when reading, we get only the bits 4 to 7 of the LCD's data bus)
  - when writing, the FSM starts, selects the instruction register
       and shifts the nibbles while strobing the EN pin.