MULI : MULtiply Initialisation

This instructions fills one entry of the Multiply unit's LookUp Table (LUT). It is used at boot-time in the versions of the YASEP architecture that use a SRAM-assisted multiplier (ACTEL FPGA).

It is a necessary to initialise the whole LUT before MUL8L and MUL8H can work correctly, and MULI is an implementation-specific opcode used during system powerup. This opcode is used for early versions of YASEP16 and will evolve in later versions. This instruction writes to the LUT and no result goes to the register set, so it can not be aborted.

The order of the operands and the purpose of each field is similar to that of the MUL8x instructions, with the added field of the initialisation value.

• snd : the lower byte is one "address" operand, composed of 2×4-bit fields that must be equal (bit(0)=bit(4), bit(1)=bit(5)...)
• si4 : The lower byte is the second par of the address with 2 equal 4-bit fields. The higher byte is the initialisation value (the product of the 4 lower bits of SND and SI4)