Welcome to the YASEP.org website !
version 2012/08/31 PRELIMINARY(several features are broken, and it's always in development anyway)
What is the YASEP ?
The acronym "YASEP" means "Yet Another Small Embedded Processor".
It's an original, Free,
configurable (16-bit or 32-bit) microcontroller core,
meant to be quite small and as simple as possible (well, that's the original idea).
By choosing sometimes unusual methods, it is
possible to concentrate on the real issues of CPU development
(mainly : architectural choices and implementation details).
The YASEP exists in the form of this website,
which is not just source code, a simulator, an assembler,
a disassembler,
a manual, a development tool, it is all that and it will be much more !
Every part is integrated in the others (and vice versa),
so the whole remains (almost) coherent, easy to use and
quick to develop, fix and maintain.
Happy clicking !
yg
You read this message because there is an internal bug, you are a search engine, JavaScript
is disabled or your connection is too slow but most probably you don't use Firefox
or a decent web browser. Notably, MSIE often fails. I'm so sorry ! I never meant
to give you up, to let you down, to run around and desert you...
The YASEP's features and characteristics
- Single-issue, pipelined, in-order, RISC architecture with 16 "registers"
- Orthogonal 16-bit instructions : about 40 opcodes with an optional 16-bit additional immediate word or extended mode
- Compact instruction words with short and long immediate, 2, 3 or 4 register operands.
- Configurable with either a 16 or 32-bit wide datapath with/without several features (memory, multiply...).
- Adapted for memory-intensive applications with register-mapped memory : an instruction can trigger up to 3 data memory accesses, instead of 1 for a typical load-store architecture.
- The high-level architecture is specified with JavaScript+HTML, with a direct integration of the programming tools. Co-simulation is being prepared.
- The RTL source code is in VHDL (suitable for FPGA and ASIC). Actel's ProASIC3 is the targeted technology, other brands will come later.
The YASEP is Free Hardware ! It is available under the Affero GPL license.
No patent (pending or known) applies to this core.
All the code is original and copyrighted by myself, no licensing fee is collected. And your help is welcome :-)
Status
The microYASEP executed its first instructions in FPGA in 2012-03. However the YASEP project is still not considered ready. Not all features are defined, most are only preliminary. The source code and documentation are incomplete but growing fast. Stay tuned !
Download
You can download the whole YASEP website (source code, pages, documentation, tools, etc.) as
a single .tgz archive. You can test the YASEP at home, and play
with the source code at will.
Note : if you want to use certain features (like file save/load),
you need a web server with PHP on your computer. Install Apache under GNU/Linux,
or EasyPHP under MS Windows.
This site
The following open directories contain search-engine-friendly data ;-)
- ASM: Assembly language tools and interfaces
- core-js: the JavaScript source code of the YASEP definitions, assembler, disassembler, simulator...
- defora: several files (some automatically generated) to support DeforaOS' assembler and disassembler
- dev: code for developping this site (minifier)
- doc: documentations about various aspects of the project
- examples: as the name suggests...
- GNL: "GNL is Not a Language" (or my vision of a block-based programming interface)
- gui-js: the JavaScript source code of many interfaces and gadgets
- img: pictures, illustrations
- ISM: the Instruction Set Manual pages
- test: some proof of concept codes
- C and VHDL source code are available again, enjoy :-)
The YASEP on the web
- The YASEP has its own website : yasep.org. You are probably reading this there.
- Some mirrors exist as well, and may be out of synch. The one at seul.org vanished in early 2010
due to technical problems, after 10 years of great service. Another mirror
is now available from TuxFamily. Thank you !
- The old site YASEP2009 (for historical reasons).
- A blog provides less-technical informations and some human interaction.
- A modular assember (written in C) is being developped by DeforaOS and support for the YASEP architecture started in september 2011.
- OpenCollector is the best place to look for other Free designs and tools !
- F-CPU is where it all started (more or less)
- Wikipedia has an interesting list of soft cores.
- The Homebuilt CPUs WebRing maintained by Dave R Brooks
Browser requirements
The only requirement is the use of Firefox (or any other Gecko-based browser) because this all-in-one project heavily relies on Mozilla's JavaScript engine.
Supported web browsers
This site is developed on a basic laptop with Firefox (currently 12, but 3.5 should work), plus some Opera tests from time to time.
It is known to work with other browsers like Seamonkey, Omniweb, Shiira, Safari, Konqueror, Opera and Chrome. With a flaw or two.
It is known to not work with Internet Explorer (you could send me a patch but actively supporting IE would be counter-productive). Camino seems to not like it either.
The site uses a lot of drag&drop, the window manager does not work with "tablets" or "smartphones" (iPhone, iPad, Android...). Their JavaScript support is often not advanced enough too. Use a desktop or a laptop, with a mouse or a stylus, but touch surfaces don't do it...
Cookies
They are not absolutely necessary but add useful persistence for navigation (window types and positions). No user specific data are recorded, sent or used. The site is mostly stateless and no session is handled by the server. Save your work often !