vspsim/updates.txt 2006-09-02 : - changed the last SWH to SHH (Store Word High to Store Half-word High) - moved/Split the JavaScript files to either JScore and JSgui, so the JScore files can be used without GUI or without the Mozilla environment (with a CLI for example) - removed "spacing:" in CSS because Firefox seems to dislike it... 2006-09-04 : - added JScore/vsp_disasm.js and updated ISM/asm.html, added a few range checks as well. - started a prototype code that saves data to files (under the user's authority). 2006-09-06 : - merged ISM and doc into doc - enhanced the save and file functions, they need to be better developped and merged. - CSS cleanup - moved text from doc/opcode_map.html to doc/assembly.html and started the description of the assembler 2006-09-06 - renamed doc/vsp_instruction2.gif to vsp_class_alu.gif, added vsp_class_jmp.gif - added the first CTL class instructions (nop, mov...) and vspsim/doc/ISM/NOP.html 2006-11-10 - starting ploped2 2006-11-18 - ploped now has a dedicated directory under /test/ploped_proto and drawsegment is moved there. - jmp instruction class still ... not finished. Some issues must be solved - trying to merge load and save functions in a single module. 2007-03-28 - the JMP instruction class is still in limbo - assembly is bork, i don't remember how i did this. - /doc/opcode_map.html#NOP didn't work, fixed by changing a stupid test. - initiated the dynamic instruction tree in /doc/opcode_map.html but kept it inside comments. - the floating asm thing did not work outside some of directories (in a fixed list), i removed the directory parsing thing in JSgui/floating_asm.js and moved the prefix to the calling page. Doing otherwise would have been too difficult in the long term. ==> In fact, now, every DHTML file should include in the header, and the footer is the usual which does the rest. Without the "prfx" variable, the directories are unreachable. 2007-04-01 - simplified the /ISM/*html files a bit more (thank you, sh/grep/sed) - PUT needs the creation of the "FORM_RI" form so i added it. - some clarification for the default values of unused register fields in JScore/vsp_asm.js (see doc/assembly.html#def ) - opcodes could use a short form, where the src2 field contains a 4-bit integer instead of a register number. Useful for EU and GET/PUT but not very... handy yet. It's something to keep in mind but the VSP's opcode space is too small, only few opcodes could use it (CTL group ?) The next architecture should have a better Imm/reg flag (reg/imm5/imm16). - initiated test/test_opcodes.html - the assembler can put the encoded instructions somewhere through the "emit_bin(data, size)" function (if defined) - DB, DH & DW pseudoinstructions are bork, while trying to extend the format. - the JMP class is still bork 2007-04-02 - test/test_opcodes.html works 2007-04-04 - DB/DH/DW pseudo-instructions now accept an unbounded list of numbers. 2007-04-05 - working on the first jmp/skip instruction group adding FORM_Q, FORM_CQR, FORM_CQRI, FORM_CIR, FORM_CIRI - adding ALIAS_IR ? - assembly.html#CIR/CIRI/Q/CQR/CQRI missing, vsp_asm/disasm.js incomplete, /ISM/J-JN-S-SN.html missing, aliases missing 2007-04-06 - added the minlength and opt_h fields to JScore/txt_int.js int2hex() because the skip length argument doesn't need the trailing 'h' - added FLAG_SKIP, FORM_QR, FORM_QRI, FORM_IRI 2007-04-07 - the jump instructions are still ... not satisfying. The fields must be moved around, again... - table_opcode[] is gaining a wider definition, to support the aliases (this didn't work because of safety measures). It should allow the aliases to have a different form than the base opcode. - JSgui/vsp_messages.js is even better (there was some race condition somewhere) - added opcode_aliases[] in vsp_opcodes.js (and populated in vsp_jmp.js) - added : ignore field (used later for EMI reductions) - test/test_opcodes.html working 100% (but with uneven syntax) --> vsp_asm.js and vsp_disasm.js are in sync --> gotta make the .js files cleaner by making all temp. vars local (to prevent name collisions and clogs) Probable future instructions : * min and max instructions are ... quite easy to make. route the 2 operands to ASU, perform substraction, XOR the Carry bit with the instructions's MIN/MAX field. the result (1/0) will enable/disable the write of the src2 into src1/dest ---> The value of src2 must be routed through another data path than ASU. * CMOV : conditions : S, Z, O, negation, of src2 value=0/imm16 written to src1/dest --> version inconditionnelle : clear * also missing : Jmp/Skip R,R (Z/C) --> FORM_(Q/I)RR |  FORM_(Q/I)RI Z = Zero C = Carry / Above - missing : ISM/(J/S)(N)(S/O/E/Z).html 2007-04-09 - opcode_map.html displays all the flags - JSgui/decoration.js removed, contents moved elsewhere. - separation of Forms and Flags, because the room is getting tight. --> parts of vsp_forms.js moved to vsp_flags.js --> most files changed to take the new attribute into account --> constants ALL_FORMS and ALL_FLAGS are useless now, so they're removed. - adding the -X forms (to indicate a long instruction form where the imm16 value is ignored) --> candidates are : NOP, HALT, RETI, INV, JMP, SKIP, JO, JS, JNO, JNS, SO, SS, SNO, SNS --> new forms are X, QX, IX, QRX, IRX, RX, RRX --> new flag: FLAG_IGNORE_IMM16 - int2hex is a bit... annoying (always needing -1 in the min/max length arguments) - removed all commas in the example and disassembled codes. This makes life easier and the examples are less confusing. - vsp_disasm is too ... spaghetty. the nested if/else structure is too fragile. A better method should be used. - doc/opcode_map.html#flags and doc/opcode_map.html#forms are ok ? the "instruction classes" should be... less strict ( there's quite a waste of encoding space. ) ? the JS loading time could be reduced, when clicking on links, by using some AJAX tricks. Later, as the JS will become larger, it might save some time. 2007-04-11 - cleanup of the flags' documentation (doc/assembly.html etc.) - the core files are now listed in JSgui/js_list.js which is now loaded by most files --> now it's possible to work on the instruction group/class issue without breaking everything. - vsp_eu.js split to group_eu.js group_asu.js, group_rop2.js, group_shl.js, group_ie.js and group_misc.js - creating vsp_cmov.js - removing ADD1/SUB1/ADDC1/SUBB1 ? min/max pour les mov négatifs inconditionnels ? ? add/create a "FIELD" attribute ? (like the FORM_ and FLAG_ attributes) ? drop the use of the "instruction classes" and create more flexible "groups" of variable lenghts ? how to fill the unused conditions in the JMP group ? ? extension du champ skip à 4 bits ? ? forme Q à virer ? ? FLAG_JMP à virer, remplacé par FLAG_SKIP (???) ? MULTSTEP/DIVSTEP ? ? FLAG_QUEUE pour Qxx 2007-04-13 - JSgui/js_list.js now accepts an argument and detects an already defined add_message() - found a stooooopeed bug in vsp_disasm.js / unknown_opcode() - adding vsp_groups.js - prefix is now auto-incremented inside JScore/vsp_opcodes.js:NewOpcode() and the value parameter is removed. - stroke of genius ! ADDSx/SUBSx : skip 0 to 3 half-words if carry is generated. --> no need of useless ADDC/SUBB instructions, or of carry flag !! but could create other problems. - updated doc/vsp.html completely, asm/disasm and tests are BORK - need to be updated : ISM/*.html (touch'ed) and dump_opcode_table.js 2007-04-14 - doc/assembly.html updated (Qxx forms removed) ? Skip field is 2 bits but could be 4 bits. I prefer to keep it short for now, for HW reasons, it can still be extended later. ? instead of "Ignore Imm16"-like flags, create other flags READ_SRC1 WRITE_SRC1 READ_SRC2 WRITE_SRC2 USE_IMM16 USE_IMM0 <-- when Imm/reg=0 USE_Q USE_SKIP_CARRY USE_SKIP_COND USE_CONDITION That would simplify many, many things... Then the "ignore" mask would be ~(USE_..|USE_...|USE_...) ? instruction CIP : Current Instruction Pointer (R, IR) CIP (+Imm16) => R ? CQ -> R ? SR : MSB = 1 -> public space MSB = 0 -> private space 2007-04-15 - I tried to validate it but it breaks many things... i'll retry later. one day. http://validator.w3.org/check?uri=http://f-cpu.seul.org/whygee/vspsim/doc/opcode_map.html - added the color code to index.html - before rebuilding asm/disasm, i want to incorporate the USE_... flags. - should the tested register be SRC2 or SRC1 ?? many changes are still going to happen ! - removing FLAG_IGNORE_IMM16 - doc/vsp.html and doc/assembly.html must be reviewed because the operand order has been altered (misc, shl, ie). - /ISM/ incomplete ? inverser le sens des opérandes de shift pour faire des masques 1 bit / N bits à 1 ? - the computation of encoded_ignored_fields in vsp_asm is changed 2007-04-16 - "NOT" aliased to NAND - change the opcode_map.html code to include stats from the aliases (ie : NOT does not have the same forms as the NAND instruction) ? new instructions : "CQ", CIP, SCQ CQ : sets the destination register to the value of CQ SCQ : skips instructions according to the value of CQ (CQ=1 -> skip 1 half-word ?) CIP : reg dest = CIP(+imm16) ? new groups : PFQ flags (post-increment etc.) SMT (create/kill processes, semaphores) BITSTREAM ? ? There is no certain way to know whether an instruction is long or short just by knowing its form, for FORM_IR and FORM_I ? PFQ flag : burst/word-by-word (for I/O) 0 nothing (default) 1 nohing, no burst 2 read postinc 3 write postinc 4 read postdec 5 write postdec 6 pseudostack (read postdec, write postinc) \ read+write in the same instruction does not change the pointer 8 stack (read postinc, write PREdec) / 2007-04-17 : 10000 lines of code ! 3772 lines of Javascript, 4605 of HTML - asm/disasm/test_opcode : OK - replacing FLAG_QUEUE and FLAG_SKIP with USE_Q and USE_SKIPCOND - doc/assembly.html : flags not complete - change the MIN/MAX instructions to allow Imm/Reg (the Imm becomes the value to compare, not the value set) - opcode MOV moved to group_ie (where it looks most similar because both SWP and SRC1orIMM) - NEG alias : works, not nicely but just enough not to care. ! code examples for the conditional instructions are missing 2007-04-18 ? Skip Length : should be incremented more, counting the skip instruction's length a compromise would be to increment by 2 instead of 1. - ISM/* ok, ADDSx/SUBSx modified to account for the size of the skipping instruction ? generation of the ISM/ pages should be even more automated ! - unused bits in Imm16 are not taken into account in vsp_asm :-/ * SHL group uses only 5 bits * SB uses only 8 bits